In recent years, high-speed imaging apparatuses capable of performing imaging at a speed higher than a normal video frame rate (60 frames per second, 50 frames per second, 24 frames per second, or the like) have become widely used.
For realization of imaging and recording at a high frame rate, for example, high-speed imaging apparatuses capable of realizing high-speed imaging with a reduced number of pixels that are read from solid-state imaging elements within one frame without increasing the speed of the subsequent processing have been available. Such high-speed imaging apparatuses employ a technique for recording a plurality of frame images with a reduced number of images within one frame of a standard video signal in such a manner that the plurality of frame images are joined together (see, for example, Patent Document 1) or a technique for performing recording onto a semiconductor memory using a dedicated compression scheme or image format (see, for example, Patent Document 2).
[Patent Document 1] Japanese Unexamined Patent Application Publication No. 8-88833
[Patent Document 2] Japanese Unexamined Patent Application Publication No. 2006-319513
Additionally, high-speed imaging apparatuses in which imaging data output by driving a solid-state imaging element at a high speed is recorded directly onto a semiconductor memory to realize high-speed imaging have been available. In many of such high-speed imaging apparatuses, since imaging data is output from a solid-state imaging element at a speed that is too high to perform subsequent signal processing, uncompressed RAW data is recorded without any change. Such high-speed imaging apparatuses have been commercially available mainly for industrial inspection.
Then, additionally, high-speed imaging apparatuses that realize high-speed imaging by spatially dividing an image of one frame and processing individual areas in parallel have been available. Such high-speed imaging apparatuses employ a technique for distributing an output from a solid-state imaging element in units of horizontal lines and performing parallel processing (see, for example, Patent Document 3) or a technique for splitting incident light using a prism, supplying resulting light components to a plurality of solid-state imaging elements, and processing output signals of these solid-state imaging elements in parallel (see, for example, Patent Document 4).
[Patent Document 3] Japanese Unexamined Patent Application Publication No. 1-286586
[Patent Document 4] Japanese Unexamined Patent Application Publication No. 5-316402